1. Field of the Invention
This invention relates to data storage systems including systems and methods for the on-line replacement of an existing data storage system. More particularly this invention relates to a system and method for transferring data from one disk storage sub-system to another.
2. Description of Related Art
Data processing centers of businesses and organizations such as banks, airlines and insurance companies, rely almost exclusively on their ability to access and process large amounts of data stored on a data storage system or device, typically a disk array storage device. Data and other information which is typically stored on one or more data storage devices which form part of a larger data storage system is commonly referred to as a database.
Databases are nearly always "open" and constantly "in use" and being accessed by a coupled data processing system, i.e., a central processing unit (CPU) or host mainframe computer. The inability to access data is disastrous if not a crisis for such business and organizations and will typically result in the business or organization being forced to temporarily cease operation.
During the course of normal operations, these businesses and organizations must upgrade their data storage devices and data storage systems. Although such upgrading sometimes includes only the addition of data storage capacity to their existing physical systems, more often than not upgrading requires the addition of a completely separate and new data storage system. In such cases, the existing data on the existing data storage system or device must be backed up on a separate device such as a tape drive, the new system installed and connected to the data processing unit, and the data copied from the back-up device to the new data storage system. Such activity typically takes at least two days to accomplish. If the conversion takes more than two days or if the business or organization cannot withstand two days of inoperability, the need and desire to upgrade their data storage system may pose an insurmountable problem.
Some prior art data copying methods and systems have proposed allowing two data storage systems of the same type, a first system and a second system, to be coupled to one another, and allowing the data storage systems themselves to control data copying from the first to the second system without intervention from or interference with the host data processing system. See for example, the data storage system described in U.S. Pat. No. 5,544,347 issued Aug. 6, 1996 entitled DATA STORAGE SYSTEM CONTROLLED REMOTE DATA MIRRORING WITH RESPECTIVELY MAINTAINED DATA INDICES, fully incorporated herein by reference, which describes one such remote data copying facility feature which can be implemented on a Symmetrix 5500 data storage system available from EMC Corporation, Hopkinton, Mass.
Although such a system and method for data copying is possible, in most instances, the first and second data storage systems are not of the same type, or of a type which allow a "background" data migration to take place between the two data storage systems, unassisted by the host and while the database is open. Additionally, even on such prior art data storage systems, migrating data as a "background" task while the database is "open" does not take into account the fact that the data is constantly changing as it is accessed by the host or central processing unit and accordingly, if the old system is left connected to the host, there will always be a disparity between the data which is stored on the old data storage system and the data which has been migrated onto the new data storage system. In such cases, the new data storage system may never fully "catch up" and be able to be completely synchronized to the old data storage system.
Co-pending U.S. patent application Ser. No. 08/522,903 depicts a system and method for migrating data from a first or a donor data storage device or sub-system to a second or target data storage device or sub-system. As described more fully therein, the target data storage device replaces the donor disk storage device and has the same general configuration as the donor storage device, albeit generally with a greater capacity. Connections are established among a host computer system and the donor and target storage devices so that data transfer requests from the host processor are handled by the target storage device. A copy subroutine, normally controlled to operate in a background mode, transfers sequential blocks of data elements, by track in the specifically disclosed embodiment, from the donor to the target storage device. The target storage device also responds to data transfer requests, such as read and write commands, that identify locations for particular data elements in one or more sequential locations. When this occurs the copy subroutine switches to a primary or foreground mode to make the requested transfer of a track or block containing the data elements from the donor to the target storage device assuming that the data element is not already present in the target storage device.
As an alternative, the migration process may determine that one or more read requests from the host 12 are part of a sequence of such read requests. In such an instance, a channel process may take the current address of data being requested by the host processor and increase it by a predetermined number. For example, if the host processor were currently requesting data from an address `411`, the channel process could issue a read request to the donor storage device for the data at address `411`. Generally simultaneously the channel process will pass an indication to begin prefetching data from the next successive address so that the target storage device "gets ahead" of the channel process in the actual data requests from the donor storage device.
This general concept of prefetching or otherwise optimizing the transfer of data from one data storage facility to another has also been disclosed in a number of other patents including:
______________________________________ 4,371,927 (1983) Wilhite et al. 4,980,823 (1990) Liu 5,146,578 (1992) Zangenehpour 5,293,679 (1994) Shih et al. 5,530,941 (1996) Weisser et al. ______________________________________
United States Letters U.S. Pat. No. 4,371,927 discloses a data processing system including a cache store to provide an interface with a main storage unit for a central processing unit. The central processing unit includes a microprogram control unit in addition to control circuits for establishing the sequencing of the processing unit during the execution of program instructions. Both the microprogram control unit and control circuits include means for generating pre-read commands to the cache store in conjunction with normal processing operations during the processing of certain types of instructions. In response to pre-read commands, the cache store, during predetermined points of the processing of each such instruction, fetches information which is required by such an instruction at a later point in the processing thereof. It is the object of the execution of pre-read commands to provide a prefetch capability suitable for use in either a high speed processing system or a multiprocessing environment.
United States Letters U.S. Pat. No. 4,980,823 discloses a method and apparatus for sequentially prefetching data with deconfirmation. Specifically, a computer memory management method for cache memory uses a deconfirmation technique to provide a simple sequential prefetching algorithm. Access sequentially is predicted based on simple histories. Each memory line in cache memory is associated with a bit in an S-vector, which is called the S-bit for the line. When the S-bit is on, sequentiality is predicted meaning that the sequentially next line is regarded as a good candidate for prefetching, if that line is not already in the cache memory. The key to the operation of the memory management method is the manipulation (turning on and off) the S-bits. It is the object of this methodology to provide a technique that will substantially reduce cache misses and prefetch with high accuracy based upon simple histories.
United States Letters U.S. Pat. No. 5,146,578 discloses a method of varying the amount of data prefetched to a cache memory in dependence on the history of data requests. If the previous fetch and current fetch requests are not sequential no data is prefetched. If the previous fetch and current fetch request are sequential and less than all of the current fetch request is already in the cache, two blocks of data sequentially beyond the current fetch request are prefetched. If the previous two blocks fetched and current fetch request are sequential and less than all of the current fetch request is already in the cache, four blocks of data sequentially beyond the current fetch request are prefetched. If the previous three blocks fetched and the current fetch request are sequential and less than all of the current fetch request is already in the cache, eight blocks of data sequentially beyond the current fetch request are preferred. The prefetch algorithm is limited at eight blocks. Each additional sequential request, when less than all of specified data is already in the cache, will cause eight blocks to be prefetched. The object of this methodology is to sequentially prefetch data only when it is advantageous to perform such prefetching based upon past history and to provide a methodology by which the amount of data which is prefetched can be altered.
United States Letters U.S. Pat. No. 5,293,609 discloses a method for a hit density based replacement for a data cache with prefetching. A least recently used cache replacement system includes a data cache that is logically partitioned into two separate sections, demand and prefetch. A cache directory table and a least recently used table are used to maintain the cache. When a new demand data page is added to the cache, a most recently used (MRU) pointer is updated and points to this new page. When a prefetch page is added to the cache, the least recently used pointer of the demand section is updated with its backward pointer pointing to this new page. A cache hit on a demand of prefetch page moves that page to the top of the least recently used table. When a free page is needed in the cache, it is selected from the demand or prefetch sections of the memory based on a comparison of the demand hit density and the prefetch hit density so to maintain a balance between these two hit densities. It is the objective of this system to provide a cache management data system that automatically adjusts the size of the storage areas of cache allocated for demand and prefetch data to balance allocated areas on the basis of area performance during operation.
United States Letters U.S. Pat. No. 5,530,941 discloses a system and method for prefetching data from a main computer memory into a cache memory. The main and cache memories are accessible by a host processor and other bus masters connected thereto by a bus. Code data elements to be read by the host processor are predicted. The predicted code data elements are then transferred from the main memory to cache memory without delaying memory access requests for data from the other bus masters. The objectives of this system are to improve the response time of a memory system by prefetching.
The foregoing prior art utilizes one of two basic approaches either singularly or in combination. In one approach, the system is adapted for operating under a set of conditions in which it is presumed that any requests for data from a host processor system will be random in nature. In the other it is assumed that the requests will access locations sequentially. Some combine the two. However, in those systems described in the cited patents, the methods are applied to transfers to a cache memory. In such applications only small amounts of memory are involved. Performance in such systems will degrade if a large amount of data needs to be transferred. In each patent the methodology is involved with the processing aspect of data system operation that involves the actual manipulation of data. Nothing in these patents discloses on-line transactions when data is being manipulated with the parallel migration of data from a donor storage device to a target storage device. Responses to host processor data transfer requests can slow, even with the system disclosed in the copending application, to a level where the data migration is no longer transparent and on-line performance is affected.